FIG. 16 is an illustration of a conventional power cutoff technology. A controlled circuit 1601 is connected to a power source 1604 and a pseudo ground 1606. In a switch circuit location area 1603, a switch circuit 1602 comprising one or a plurality of transistors is provided between the pseudo ground 1606 and a ground 1605. In the transistors, gates, drains and sources thereof are connected in the same manner. All of the gates of the transistors are connected to a control signal input terminal 1607, and control signals for power control are supplied from a semiconductor integrated circuit to the control signal input terminal 1607.
When the controlled circuit 1601 is operating, a control signal for turning on the switch circuit 1602 is inputted to the control signal input terminal 1607. The input of the control signal renders the pseudo ground 1606 and the ground 1605 short-circuited, and the controlled circuit 1601 correspondingly carries out a normal operation. On the contrary, a control signal for turning off the switch circuit 1602 is inputted to the control signal input terminal 1607 when the controlled circuit 1601 is not operating. As a result, the connection between the pseudo ground 1606 and the ground 1605 is blocked. A potential of the pseudo ground 1606, when power is cut off, rises to a point at which a halt-time leak current of the controlled circuit 1601 and a leak current of the switch circuit 1602 come into balance with each other. According to the power control configured to cut off power while the controlled circuit 1601 is not operating, the leak current can be significantly lessened as compared with any other power control methods wherein the power cutoff is not implemented during the non-operating state.
As so far described, the leak current can be lessened by employing the power cutoff technology wherein power is cut off selectively in any block which is not used for circuit operations and data retention. Therefore, the technology effectively contributes to the reduction of power consumption in LSI. The power cutoff technology thus advantageous, however, includes such a problem as the occurrence of an instantaneous carrying current. Below is described the problem. FIG. 17 is a drawing briefly describing the instantaneous carrying current produced in the power cutoff technology.
In the power cut-off state, the voltage of the pseudo ground 1606 rises and reaches a voltage level 1701. the voltage of the pseudo ground 1606, however, takes a sudden drop to a voltage level 1702 when the switch circuit 1602 is turned on and moves to a power supplied state. Then, charges stored in the controlled circuit 1601 are drawn out in the direction of the ground 1605 through the switch circuit 1602, making a large instantaneous carrying current 1705 flow. A leak current 1703 in the power cut-off state flows before the occurrence of the instantaneous carrying current 1705, while a leak current 1704 in the power supplied state flows after the occurrence of the instantaneous carrying current 1705. The leak current 1704 is larger than the leak current 1703.
The flow of the instantaneous carrying current 1705 causes IR-Drop owing to parasitic resistance, and a potential of the ground 1605 correspondingly undergoes noises. When this non-operating circuit block is connected to an operating circuit block by way of the ground 1605, the noises generated in this non-operating circuit block are transmitted to the operating circuit block. The transmission of the noises may cause a malfunction.
Various technical ideas have been proposed in order to solve the problem of the instantaneous carrying current. FIG. 18 is a brief illustration of a first technical idea recited in Patent Document 1, which is described below. A current monitor circuit 1809 is provided between a controlled circuit 1801 and a switch circuit location area 1802. To the switch circuit 1802 is inputted a signal outputted from a power cutoff switch control circuit 1808 in place of a control signal from the LSI side. At that time, the power cutoff switch control circuit 1808 decides a signal to be outputted to the switch circuit 1082 based on a signal transmitted from the current monitor circuit 1809. According to the device thus constituted, a current flowing in the switch circuit 1802 is restrained from exceeding a predetermined current value.
The first technical idea, however, requires the power cutoff switch control circuit 1808 and the current monitor circuit 1809, and a control system provided with these circuits has a complicated configuration. The location of the current monitor circuit 1809 demands such a design that is capable of dealing with the occurrence of, for example, parasitic resistance so that the current monitor circuit 1809 will not impact the controlled circuit 1801. As described, the first technical idea fails to come up with an easy solution for the problem of instantaneous carrying current.
FIG. 19 is a brief illustration of a second technical idea recited in Patent Document 2, which is described below. According to the second technical idea, each substrate node of a switch circuit 1902 is connected to a substrate bias control circuit 1908. The instantaneous carrying current flow is produced in the transition of a power cut-off state to a power supplied state. At this time, a reverse substrate bias outputted from the substrate bias control circuit 1908 is applied to the switch circuit 1902. As a result, a current capability of the switch circuit 1092 is reduced, which leads to the reduction of the instantaneous carrying current.
However, the second technical idea based on the control of the current capability of the switch circuit 1902 through the bias control can only exert a limited effect, thereby failing to provide an ultimate solution for the instantaneous carrying current.
Patent Document 3 relates to an output circuit and deals with a different subject and a different purpose. The device recited therein drives circuits having different current capacities in a time-shifting manner. When the technical idea is implemented in the power cutoff technology, the instantaneous carrying current may be reduced to a certain extent. However, it is still unlikely to reduce the instantaneous carrying current effectively enough to eradicate the risk of a circuit malfunction.    Patent Document 1: 2007-179345 of the Japanese Patent Applications Laid-Open    Patent Document 2: 2007-201414 of the Japanese Patent Applications Laid-Open    Patent Document 1: H01-279631 of the Japanese Patent Applications Laid-Open